Digital signal processors (DSPs) are employed in a variety of applications, including the processing of audio signals and/or data. DSPs typically have a digital signal processor core and associated memory as well as a variety of other circuitry. Many audio DSPs today utilize digital decoding and pulse coded modulation (PCM) to process audio data. Typically, PCM post-processing is performed on multiple channels of audio data in which a DSP processor receives blocks of decoded audio data from the decoder. The decoded data is usually provided to the DSP processor one channel at a time. The number of samples in each block of data is usually related to the particular decoding algorithm utilized and, in current decoders, the decoding block ranges from approximately 16 to 1024 samples for each channel. Since many post-processing algorithms require data from all of the channels simultaneously, the DSP typically buffers at least one block of data for each channel as it is received from the decoder before post processing is performed.
In a common prior art technique, double-buffering is employed to buffer blocks of decoded audio data. In a double-buffering scheme, two separate memory buffers are utilized to buffer the decoded data for processing. One memory buffer is loaded with decoded data, which is then post-processed. While post-processing is occurring on the first buffer, the second buffer is employed to collect a new set of data blocks from the decoder. Each time a new set of data fills one buffer and post-processing completes on the other buffer, the buffers swap their operation so that post-processing executes on the buffer with the new data while the buffer previously used for post-processing is now collecting the next set of data blocks.
Double-buffering allows post-processing to occur continuously without stalling while new decoded data is collected and allows decoding to occur continuously without stalling while old data is post-processed. Double-buffering is a simple algorithm to develop and maintain. The main drawback of double-buffering is that it requires two buffers, which becomes problematic in systems with limited memory resources especially as the size of the decoded blocks increases. As the block size and number of channels increase, the memory requirements may become prohibitive for the particular DSP. For example, double-buffering for 8 channels with a block size of 1024 samples per channel requires 16,384 (16K) words of memory (8×1024×2=16K). Accordingly, when additional channels or larger block sizes are employed, the increase in buffer size is multiplied by a factor of two (2) since two complete buffer memories are needed.
In a typical data processing scheme operated using the prior art scheme, two separate input buffer units (e.g., double-buffering) would be needed. One input buffer would be utilized to receive the data input while the second buffer, having been loaded with earlier data, would then supply the data to the processing buffer for the DSP to process. Once all of the data in the first input buffer is post-processed and the second buffer is filled with new data, the two buffers switch roles. Employment of a single buffer of decoded data for post-processing by a DSP while maintaining the throughput normally associated with double-buffering is advantageous and desired.